oldfart
07-04-2003, 03:24 AM
Saw it on ABX. ctlaw (ftp://ftp.heise.de/pub/ct/ctsi/ctiaw.zip) will test for PAT enabled among other things. It seems to have one bug that I can see. It calculates mem speed from stock FSB instead of actual. Here is mine from my IC7 running a 5:4 ratio. Like CPUz 1.18c, it shows that PAT IS working.
**** INTEL/AMD/VIA memory config info, c't/Andreas Stiller V2.7 June 03 ****
Kernel Driver: WinNT DIRECTNT.SYS V01.09
Pentium 4,(0F29-09)ca 3654 MHz (sleep) 3343 MHz (load)
Bus Speed: max=200MHz, ratio=13 => 257 MHz
Hostdevice: (2578) Canterwood i875 MCH, Vendor: (8086) Intel, Rev:0002h
----------------------------------------------------------------
Intel Canterwood i875 MCH Rev:02: Bus:0, Device-Nr:0, Function:0
System Frequency : FSB800/200 MHz
Memory Frequency : DDR320/160 MHz (5:4)
IOQ Depth : 12 deep
Top of usable Memory : 1024.0 MByte
Extended SMRAM (Tseg) : disabled
Overflowdevice : disabled and unlocked, ID= 257Eh, Rev: 2
Memory Delays Base Address : F4000000 not prefetchable
CPU Parking : disabled
Memory : row0: 512 MByte/16 KB Pages
: row1: 512 MByte/16 KB Pages
DRAM-Channels : Dual Channel Linear, DDR
ECC & Refresh : Non-ECC, Refresh=7.8 µs
PAT-mode : (1) fully enabled
Active to Precharge Delay : 6 clocks .. 70 µs
Tcl - Trcd -Trp : 2-2-2 T (DRAM Clocks)
Memory Read Bandwidth : ca. 5966.9 MBytes/s, Cacheline size= 128
>> go on with CR
**** INTEL/AMD/VIA memory config info, c't/Andreas Stiller V2.7 June 03 ****
Kernel Driver: WinNT DIRECTNT.SYS V01.09
Pentium 4,(0F29-09)ca 3654 MHz (sleep) 3343 MHz (load)
Bus Speed: max=200MHz, ratio=13 => 257 MHz
Hostdevice: (2578) Canterwood i875 MCH, Vendor: (8086) Intel, Rev:0002h
----------------------------------------------------------------
Intel Canterwood i875 MCH Rev:02: Bus:0, Device-Nr:0, Function:0
System Frequency : FSB800/200 MHz
Memory Frequency : DDR320/160 MHz (5:4)
IOQ Depth : 12 deep
Top of usable Memory : 1024.0 MByte
Extended SMRAM (Tseg) : disabled
Overflowdevice : disabled and unlocked, ID= 257Eh, Rev: 2
Memory Delays Base Address : F4000000 not prefetchable
CPU Parking : disabled
Memory : row0: 512 MByte/16 KB Pages
: row1: 512 MByte/16 KB Pages
DRAM-Channels : Dual Channel Linear, DDR
ECC & Refresh : Non-ECC, Refresh=7.8 µs
PAT-mode : (1) fully enabled
Active to Precharge Delay : 6 clocks .. 70 µs
Tcl - Trcd -Trp : 2-2-2 T (DRAM Clocks)
Memory Read Bandwidth : ca. 5966.9 MBytes/s, Cacheline size= 128
>> go on with CR