eva2000
05-06-2004, 05:17 PM
things are surely getting faster it seems
http://www.adata.com.tw/en/p-d1-06.htm
http://www.adata.com.tw/en/images/a64.jpg
The Vitesta DDR600 will be a Double Data Rate module that composed of CMOS Double Data Rate SDRAMs in TSOP-II 400mil 66pin package and one 2Kbit EEPROM in 8pin TSSOP (TSOP) package on an 184pin glass–epoxy printed circuit board. The Vitesta DDR600 will be a Dual In-line Memory Module and be intended for mounting onto 184-pins edge connector sockets. Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges of DQS. Range of operating frequencies, programmable latencies and burst lengths allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.
The Vitesta DDR600 will be offered in quantities in 256- and 512Mbyte capacities.
‧Capacity: 256MB and 512MB
‧DLL aligns DQ and DQS transition with CK transition
‧Double-data-rate architecture.
‧Bi-directional data strobe (DQS)
‧Differential clock inputs(CK and /CK)
‧Auto refresh and self refresh
‧8192 refresh cycles / 64ms
‧Power supply: Vdd,Vddq:2.8V±0.1V
‧Programmable Burst length (2,4,8)
‧Serial Presence Detect with EEPROM
‧Module bank :two physical bank
‧Height 31.75mm, six layers
http://www.adata.com.tw/en/p-d1-06.htm
http://www.adata.com.tw/en/images/a64.jpg
The Vitesta DDR600 will be a Double Data Rate module that composed of CMOS Double Data Rate SDRAMs in TSOP-II 400mil 66pin package and one 2Kbit EEPROM in 8pin TSSOP (TSOP) package on an 184pin glass–epoxy printed circuit board. The Vitesta DDR600 will be a Dual In-line Memory Module and be intended for mounting onto 184-pins edge connector sockets. Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges of DQS. Range of operating frequencies, programmable latencies and burst lengths allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.
The Vitesta DDR600 will be offered in quantities in 256- and 512Mbyte capacities.
‧Capacity: 256MB and 512MB
‧DLL aligns DQ and DQS transition with CK transition
‧Double-data-rate architecture.
‧Bi-directional data strobe (DQS)
‧Differential clock inputs(CK and /CK)
‧Auto refresh and self refresh
‧8192 refresh cycles / 64ms
‧Power supply: Vdd,Vddq:2.8V±0.1V
‧Programmable Burst length (2,4,8)
‧Serial Presence Detect with EEPROM
‧Module bank :two physical bank
‧Height 31.75mm, six layers